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<div class="header">
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<div class="title">SystemSharp.Synthesis.VHDLGen.VHDLTypes Member List</div>  </div>
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<div class="contents">

<p>This is the complete list of members for <a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a>, including all inherited members.</p>
<table class="directory">
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a36e1807800e6052bc7dd2a9347456db3">Convert</a>(Type SType, TypeDescriptor TTypeD, IList&lt; Type &gt; interTypes, params string[] args)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aa8f16b0bf60e33d5aba696389728092d">Convert_aSL_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a42b20ed4018f39a7a9c8d7feefba0402">Convert_bool_StdLogic</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a13ba538fbd8a522ce0c3158cbd795bb5">Convert_byte_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#adec34db098359c8f67c13946a8dab291">Convert_byte_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a570109968e360519d4e0c4dd7c38cc2b">Convert_byte_short</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a36645accd1acaaec9e6387b66d8e7850">Convert_byte_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aa5cf594f7379d7387b31d823a2eaab14">Convert_byte_Unsigned</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a73ace04e00605437697a4450a6ae063a">Convert_byte_Unsigned</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a7f78b46624db652ba9fc1f7d1c1bea4b">Convert_byte_ushort</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aaa53e220fec92fd726ae8b0e4cecc439">Convert_char_StdLogic</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a89486446d1fa662f78476e70db5311b2">Convert_double_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a491b0d5492f006f053ed4138bf9087a4">Convert_double_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#af006d6d4a56368738a82d8569d2ec49b">Convert_double_SFix</a>(string value, string intWidth, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#adc7578699162993e5e3ccc2fe645f7d5">Convert_double_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a7c217b82264ea26ece110ddecb94d04d">Convert_double_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#afc0c598f383e890ee86c435c3fa0fb39">Convert_double_UFix</a>(string value, string intWidth, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a003547b48dcf788a7700492995b45539">Convert_float_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a8bc46825a114f39b2009d40978755c8d">Convert_float_SFix</a>(string value, string intWidth, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a37d777a43ef8ee2b18b7ab15cc0c47d2">Convert_float_SFix</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6689c5215594c36c32c314b7d4a8363e">Convert_float_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a389f5a39bb13f880979982e22fb69b64">Convert_float_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aebd632714c0b7176674fc08b127da422">Convert_float_UFix</a>(string value, string intWidth, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a3d4b73d563e04cf3efcb3c6722c26ac8">Convert_int_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6768744aedf0b40850b51e18db0086e9">Convert_int_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae4d2a99b91aa2734b47e781d7b28d4cc">Convert_int_Signed</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#afed582950f4e63c6bac0219b7239a13b">Convert_int_Signed</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a296968a566fbf9c90c74f74e1f5f7c12">Convert_int_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#adc45d10810baddcb16aecc6a0d89dc09">Convert_int_uint</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a7a6494bcabde63f2cf7faf483b7299c2">Convert_int_Unsigned</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#afbd546c382f6e857220333d28fdfa124">Convert_long_Signed</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#af32b091000898fd7440a24b00d16e544">Convert_long_Signed</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a1a61ea81b02ff9437d1daebd115b83f6">Convert_long_SLV</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ab80f524a8b9a87f5991cc4a6c3de6ecd">Convert_long_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#acc9dfe848630341f06fd3c846f3fc4ed">Convert_long_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a4244f3df913eb17529e8a134a2c8b61f">Convert_sbyte_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a19d63e43108f258b6ad8ad3fb2d27d68">Convert_sbyte_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a5a709335073aa1cc29e3d0e563d4f9ce">Convert_sbyte_short</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6aaf29963e4d7b6dbda5983d41647952">Convert_sbyte_Signed</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#abca8da2b658fd2409e0cc9d857c0e4ac">Convert_sbyte_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a9335e1a5f605aaf4b7e3bdc9c73435a2">Convert_SFix_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae84c3e406ac93b810e05087c7aeeb021">Convert_SFix_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ab674f7f78f39f3367fa4c883c2f4112e">Convert_SFix_slv</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a864aad67564bf4eb00ff2b8528dbd4d5">Convert_SFix_UFix</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae5fc60e02b021394570b423303b7c2dd">Convert_short_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#afdc2c900b7315769a54b04a3b82647ba">Convert_short_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aa063a625fcdcb81a3f5c5f42c9343352">Convert_short_int</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6010212f3b5d67c18b7f0b214228cea0">Convert_short_Signed</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a98166268b63962e84b81361f8b40261e">Convert_short_Signed</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a30640cfb89adca6814c74fc9a0bb600a">Convert_short_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ad7d5136fbbb7ac5af82a71edd766fd72">Convert_Signed_byte</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a080340bb83b0ec10cd729562774b9c09">Convert_Signed_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a801ad1845f90786efd47c2767fc4c9cc">Convert_Signed_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a787eaf85696b28f75b71e47c4ebf1d8b">Convert_Signed_int</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a5c14849ca18d40761a3b79631a45ecd3">Convert_Signed_long</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a5177a16340ad713b55f44c7c5848225d">Convert_Signed_sbyte</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a4c0c2d111ef3cd0e5ed2ec39fe593df2">Convert_Signed_short</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a40b4016f5adb5fe367e8a9f2c97ccfde">Convert_Signed_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a4a14696fe81d18e31ef8cbb4e0d86ceb">Convert_Signed_ushort</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a13c807f4a69c2727858df1b718fac585">Convert_SL_bool</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a4dfb703d37d8acc875f33c125de0e005">Convert_SL_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ac41a14708b5440897ebb5a98ee74d6ad">Convert_SL_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a2a64e632a529009dfc999c5bc59eb6a6">Convert_SLV_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a136139fbd7708e04629080ecc2c7d74d">Convert_SLV_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#acd626fe021abef089378b482d1fec4e2">Convert_SLV_SFix</a>(string value, string intWidth, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a2a52f9393b419d8173ff0950769506f5">Convert_SLV_SFix</a>(string value, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a5ea967793be14635bc95e603ae59fec5">Convert_SLV_SFix</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ab8ea71d9f8e11b9a3dbe57547306a6d5">Convert_SLV_Signed</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aae6f8c1adc35cf05701f0a81cd55e7ce">Convert_SLV_SL</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae09fc2b4338a3f244c2b9ca47cbeea4f">Convert_SLV_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#af3ed1c2689074d0fd794ab88ba66bba8">Convert_SLV_UFix</a>(string value, string intWidth, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#af6968becf3365036eb13c23bb7b08c11">Convert_SLV_UFix</a>(string value, string fracWidth, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aff2b39dad5b90ead781781f5f3a23b52">Convert_SLV_UFix</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a91736a786d879ec50cb0e8dcc5718d45">Convert_SLV_Unsigned</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aa88d6d5fa71ea7612433717c1b9f2d2e">Convert_Time_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6aeb6f6912485d1ac3c2702ebac89ae6">Convert_UFix_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a8cc2e4fcbeaa1f3855a54680e54e6025">Convert_UFix_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ad9200abea1b330e3290f6f983852bf08">Convert_UFix_SFix</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a355705c4f0363d5cc2d8f780b3345ff9">Convert_UFix_slv</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae2153fa673b3bfd30469d809149cf770">Convert_uint_int</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a72cca4a8c9d374b3d0b93b41a7ee633d">Convert_uint_SLV</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a0bf1a3175c217fa0f8e9cf65cf5baae8">Convert_uint_ulong</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a4b4c16c9ab683cf9651790c56341dd45">Convert_uint_Unsigned</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a5082b69d22b0d3305db8848fc840766f">Convert_uint_Unsigned</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a8c0dd6f16448d3c8daba5bf8b0a108e1">Convert_ulong_SLV</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae7876724c3d7befcbefcd929448c9efe">Convert_ulong_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ab91f6612aec215059f48742dddfef35a">Convert_ulong_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ad7cf579a76c5f2674fe30ff160b4984e">Convert_ulong_Unsigned</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6db184f5c51a209b3ab0d6f036ca9b83">Convert_ulong_Unsigned</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a6d49ed126f3df74107dcacbb4c0e862f">Convert_Unsigned_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#acccee0143fd4117acd3b09c2947d93c1">Convert_Unsigned_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a196aec986b2f4129a2b5eb86c551d12c">Convert_Unsigned_int</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ad3d32361595e077f3bcbc6bdddc5a5b6">Convert_Unsigned_SLV</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ab9f3b006d154b0560b798bdbaa5ec279">Convert_Unsigned_uint</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a8d2bec8a1fd41594d727e0ae3fcf8a1e">Convert_Unsigned_ulong</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a04e6814e7b26e5e400da6c04b335b396">Convert_ushort_double</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a676e938fff0bd5e9b64d41cef61ba382">Convert_ushort_float</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ac1d337b2de2f652d40c2bfca8b9124a7">Convert_ushort_int</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#abb2f4a0fd53ecf74cfe7b4548aba6167">Convert_ushort_string</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ada4186cbbce643cf52b922e5d406798b">Convert_ushort_Unsigned</a>(string value, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#af6a68c09348270caf24c62fadc277ac0">Convert_ushort_Unsigned</a>(string value, string width, TypeDescriptor ttype)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a65d7360e83fc09b5364553257f90d8f1">GetValueOf</a>(object value, out string svalue)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a73b8f71f925625255c4354fa4f03366e">LookupType</a>(Type type, out TypeInfo ti)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a26ac40c7e96f5dbc3f25839f29821e84">ValueOf</a>(bool value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae48bddc088e70c9b37ba8d6bf467685a">ValueOf</a>(sbyte value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aacc48a3914791ebfb12da948d890520d">ValueOf</a>(byte value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aeb88cdb16a519fd71cd20972b0a724ba">ValueOf</a>(short value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a7379bb5ea038144ede27f01abc200d01">ValueOf</a>(ushort value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ac175666413394714877dec051f8cf784">ValueOf</a>(int value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a1861bcf6b76b9de119cb211e5f49451d">ValueOf</a>(uint value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a8519ab5deea8fde6e5e2b4907d9259a5">ValueOf</a>(long value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aa78f82b01ec29bf1741eb7b88744a121">ValueOf</a>(ulong value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a8e91e8a5197427738a5255b1cddbb4eb">ValueOf</a>(StdLogic value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a62ff12c36076d3a2a079e9308bfbf921">ValueOf</a>(StdLogicVector value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ac720aeb68ac3eb534c7e06933d4e922b">ValueOf</a>(Unsigned value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a5b5324272bb1e1346d20daffa9910b75">ValueOf</a>(Signed value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#af2916985654ceb498a17759b9148ffcd">ValueOf</a>(SFix value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a22730e8abac2a936aaa0cc21c5be0afb">ValueOf</a>(UFix value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#aea919752506a8412b82c1bc74c4f59f1">ValueOf</a>(string value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#a64810eef3c2954fb5861cf12a41b5065">ValueOf</a>(char value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr class="even"><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#ae9ac984720a1369e98465487f0acfc26">ValueOf</a>(Time value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
  <tr><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html#afe017daf620679b3d269540ff1498181">ValueOf</a>(float value)</td><td class="entry"><a class="el" href="class_system_sharp_1_1_synthesis_1_1_v_h_d_l_gen_1_1_v_h_d_l_types.html">SystemSharp.Synthesis.VHDLGen.VHDLTypes</a></td><td class="entry"><span class="mlabel">static</span></td></tr>
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